Energy-Aware Signal Integrity Analysis for High-Speed PCB Links

https://www.scopus.com/inward/record.url?eid=2-s2.0-84929832756&partnerID=40&md5=1fb9921f20cd25af591cdc63c44ea357

Autores Principales: Muller, Sebastián, Reuschel, Torsten, Rimolo-Donadio, Renato, Kwark, Young, Bruns, Heinz-Dietrich, Schuster, Christian
Formato: Artículo
Idioma: Inglés
Publicado: Institute of Electrical and Electronics Engineers Inc. 2017
Materias:
Acceso en línea: https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=7111305
https://hdl.handle.net/2238/7179
id RepoTEC7179
recordtype dspace
spelling RepoTEC71792022-04-09T03:05:20Z Energy-Aware Signal Integrity Analysis for High-Speed PCB Links Muller, Sebastián Reuschel, Torsten Rimolo-Donadio, Renato Kwark, Young Bruns, Heinz-Dietrich Schuster, Christian Diseño Circuitos Placas electrónicas Potencia de entrada Potencia eléctrica Research Subject Categories::TECHNOLOGY::Electrical engineering, electronics and photonics::Electronics https://www.scopus.com/inward/record.url?eid=2-s2.0-84929832756&partnerID=40&md5=1fb9921f20cd25af591cdc63c44ea357 This paper proposes a novel approach to evaluate design alternatives for high-speed links on printed circuit boards. The approach combines evaluations of signal integrity and link input power. For a comprehensive analysis, different link designs are made comparable through the application of identical constraints, with the link input power as the single figure of merit for a systematic, quantitative comparison of design alternatives. The analysis relies upon a combination of efficient physics-based via and trace models, statistical time-domain simulation, and an analytical input power evaluation, which allows it to handle links consisting of a large number of channels while fully taking into account interchannel crosstalk. The proposed approach is applied to study two fundamental design decisions at the PCB level—single-ended versus differential signaling and signal-to-ground via ratios of 1:1 versus 2:1—for a link consisting of 2048 vias and up to 175 striplines with an aggregate data rate of 1 Tb/s. It is found that both design decisions have a considerable impact on the required input power of the link. 2017-06-05T16:45:06Z 2017-06-05T16:45:06Z 2015-05 info:eu-repo/semantics/article https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=7111305 00189375 https://hdl.handle.net/2238/7179 eng Attribution-NonCommercial 3.0 Costa Rica https://creativecommons.org/licenses/by-nc/3.0/cr/ application/pdf Institute of Electrical and Electronics Engineers Inc. IEEE Transcions on Electromagnetic Compatibility, vol. 57, no. 5, Octuber 2015
institution Tecnológico de Costa Rica
collection Repositorio TEC
language Inglés
topic Diseño
Circuitos
Placas electrónicas
Potencia de entrada
Potencia eléctrica
Research Subject Categories::TECHNOLOGY::Electrical engineering, electronics and photonics::Electronics
spellingShingle Diseño
Circuitos
Placas electrónicas
Potencia de entrada
Potencia eléctrica
Research Subject Categories::TECHNOLOGY::Electrical engineering, electronics and photonics::Electronics
Muller, Sebastián
Reuschel, Torsten
Rimolo-Donadio, Renato
Kwark, Young
Bruns, Heinz-Dietrich
Schuster, Christian
Energy-Aware Signal Integrity Analysis for High-Speed PCB Links
description https://www.scopus.com/inward/record.url?eid=2-s2.0-84929832756&partnerID=40&md5=1fb9921f20cd25af591cdc63c44ea357
format Artículo
author Muller, Sebastián
Reuschel, Torsten
Rimolo-Donadio, Renato
Kwark, Young
Bruns, Heinz-Dietrich
Schuster, Christian
author_sort Muller, Sebastián
title Energy-Aware Signal Integrity Analysis for High-Speed PCB Links
title_short Energy-Aware Signal Integrity Analysis for High-Speed PCB Links
title_full Energy-Aware Signal Integrity Analysis for High-Speed PCB Links
title_fullStr Energy-Aware Signal Integrity Analysis for High-Speed PCB Links
title_full_unstemmed Energy-Aware Signal Integrity Analysis for High-Speed PCB Links
title_sort energy-aware signal integrity analysis for high-speed pcb links
publisher Institute of Electrical and Electronics Engineers Inc.
publishDate 2017
url https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=7111305
https://hdl.handle.net/2238/7179
_version_ 1785817073587322880
score 12.140644